Modeling of Integrated Circuit Yield Using a Spatial Nonhomogeneous Poisson Process

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5
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6

초록

This paper proposes a new yield model for integrated circuits using a spatial point process. The defect density variation by location on a wafer is modeled by a spatial nonhomogeneous Poisson process. The intensity function of the yield model describes the defect pattern on wafers. As a result, the model differs from the existing compound Poisson yield models in its capability to describe the spatial defect distribution. Using model-based clustering, the defect clusters from assignable causes, which contain the information about the variations of manufacturing processes, can be classified from others. The proposed model considers the defect density variation among wafers and the impact of defect size on the probability of a defect causing the circuit failure. The performance of the new yield model is verified using simulated data and real data. Simulation results show that the new yield model performs better than a compound Poisson yield model.

키워드

Model-based clustering; spatial point process; yield model; MANUFACTURING YIELD; DEFECT; RELIABILITY; FABRICATION
제목
Modeling of Integrated Circuit Yield Using a Spatial Nonhomogeneous Poisson Process
저자
Hwang, Jung Yoon; Kuo, Way; Ha, Chunghun
DOI
10.1109/TSM.2011.2143733
발행일
2011-08
유형
Article
저널명
IEEE Transactions on Semiconductor Manufacturing
권
24
호
3
페이지
377 ~ 384