Voltage and Frequency Tuning Methodology for Near-Threshold Manycore Computing using Critical Path Delay Variation

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초록

Near-threshold computing (NTC) is now regarded as a promising candidate for innovative power reduction, which cannot be achieved with conventional super-threshold computing (STC). However, performance degradation and vulnerability to process variation in the NTC regime are the primary concerns. In this paper, we propose a voltage-and frequency-tuning methodology for mitigating the process-variation-induced problems in NTC-based manycore architectures. To implement the proposed methodology, we build up multiple-voltage multiple-frequency (MVMF) islands and apply a voltage-frequency tuning algorithm based on the critical-path monitoring technique to reduce the effects of process variation and maximize energy efficiency in the post-silicon stage. Experimental results show that the proposed methodology reduces overall power consumption by 8.2-20.0%, compared to existing methods in variation-sensitive NTC environments.

키워드

Near-threshold computing; super-threshold computing; process variation; voltage and frequency tuning; multiple-voltage multiple-frequency; ENERGY
제목
Voltage and Frequency Tuning Methodology for Near-Threshold Manycore Computing using Critical Path Delay Variation
저자
Li, Chang-Lin; Kim, Hyun Joong; Heo, Seo Weon; Han, Tae Hee
DOI
10.5573/JSTS.2015.15.6.678
발행일
2015-12
유형
Article
저널명
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
권
15
호
6
페이지
678 ~ 684