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Automated Reverse Engineering Tools for FPGA Bitstream Extraction and Logic Estimation
- Cho, M.;
- Lee, D.;
- Lee, S.;
- Kim, Y.;
- Lee, H.-M.
WEB OF SCIENCE
1SCOPUS
2초록
Field-programmable gate arrays (FPGAs) are considered to be a suitable platform for various electronics thanks to high performance and reconfigurable structure, but security concerns for FPGAs should be addressed. Non-invasive attacks on FPGAs may extract configuration files, i.e. bitstream, which is stored in external non-volatile memory, to estimate data or modify it to inject malicious codes. To identify the weakness and provide solutions, researches on FPGA reverse engineering have been conducted. This paper proposes an automated tool for FPGA reverse engineering, targeting Xilinx FPGAs. The tool can extract bitstream from the external memory, identify the device type, and reconstruct the logic programmed in the FPGA based on bitstream analysis. © 2022 IEEE.
키워드
- 제목
- Automated Reverse Engineering Tools for FPGA Bitstream Extraction and Logic Estimation
- 저자
- Cho, M.; Lee, D.; Lee, S.; Kim, Y.; Lee, H.-M.
- 발행일
- 2022-01-01
- 유형
- Proceedings Paper
- 저널명
- Proceedings - International SoC Design Conference 2022, ISOCC 2022
- 페이지
- 328 ~ 329
- 언어
- ENG
- 출판사
- Institute of Electrical and Electronics Engineers Inc.
- 분량
- 2 페이지
- ISSN
- P 0000-0000