Atomic layer deposition of Al2O3/NiO/Al 2O3 laminate structures for nonvolatile memory device applications

  • Cho, W.
  • You, Y.-H.
  • Lee, S.S.
  • Chung, T.-M.
  • Lee, Y.K.
  • ... Hwang, J.-H.
  • 외 2명
Citations

SCOPUS

0

초록

We have fabricated Al2O3/NiO/Al2O 3 nano-laminate structures on Si(001) substrate using atomic layer deposition (ALD) technique for floating gate memory application. The nonvolatile capacitance-voltage (C-V) characterisitics have been investigated. NiO and Al2O3 films, as charge trapping and insulating barrier layer, were deposited using newly-synthesized Ni aminoalkoxide (Ni(dmamb) 2) and trimethylaluminum (TMA) with H2O, respectively. The hysteresis voltage window of the Al2O3 (20nm)/NiO (5 nm)/Al2O3 (5 nm) laminate structure is ∼8.6 V in voltage sweep range from -7.5 to 7.5 V, while there is no hysteresis in the Al2O3 film. copyright The Electrochemical Society.

제목
Atomic layer deposition of Al2O3/NiO/Al 2O3 laminate structures for nonvolatile memory device applications
저자
Cho, W.You, Y.-H.Lee, S.S.Chung, T.-M.Lee, Y.K.Kim, C.G.Hwang, J.-H.An, K.-S.
DOI
10.1149/1.2721498
발행일
2006
유형
Conference Paper
저널명
ECS Transactions
3
15
페이지
283 ~ 285