Serial-Parallel FFT Array Processor

초록

An array architecture to compute a fast Fourier transform (FFT) with a flexible number of identical processing elements is presented. The architecture is based on the symmetry of a constant geometry FFT. It allows easy tradeoff between the hardware complexity and the computation time. A methodology to construct a high radix FFT with simple lower radix hardware has been developed, based on successive decompositions and premultiplications. It shows that a high radix, large length FFT can be efficiently implemented with simple hardware. To verify the architecture, an experimental radix-2 processing element chip has been designed and the results. are discussed. © 1993 IEEE