Non-systematic RS Encoder Design for a Parity Replacer of ATSC-M/H System

초록

An efficient RS encoder for a parity replacer circuit of ATSC M/H mobile DTV receiver is presented. First, we derive the non-systematic RS encoder architecture which requires the well-known Forney algorithm to evaluate the parity symbol values located at arbitrary positions. We notice that only at most three information symbols corresponding to the trellis initialization symbol determine the RS parity symbols to be replaced in the parity replacer circuit. So we derive another form of the Forney algorithm to represent the parity symbol value as a linear combination of the input information symbols. With the new form, efficient architecture for implementing the RS encoder of a parity replacer is presented.

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