Vertical AND-Type Flash Synaptic Cell Stack for High-Density and Reliable Binary Neural Networks

  • Kim, Jangsaeng
  • Im, Jiseong
  • Oh, Seongbin
  • Shin, Wonjun
  • Jung, Gyuweon
  • ... Lee, Sung-Tae
  • 외 1명
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초록

A vertical AND-type (V-AND) cell stack consisting of flash memory cells is proposed and fabricated for hardware-based binary neural networks (BNNs). Low-power operation is possible with a semicircular poly-Si channel surrounded by a single word-line. In each floor, two cells facing each other along the long axis of a single channel hole share a source/drain, greatly improving cell density and making it suitable for high-density BNNs. The fabricated V-AND flash memory cells show a high on/off current ratio (> 105 ) , sub-pA off current, and large dynamic range (> 104 ). One-shot patterning of channel holes and isolation trenches minimizes loss of uniformity due to misalignment. The proposed BNN using synaptic properties measured from fabricated V-AND cells achieves high accuracy (87.82% for the CIFAR-10 dataset). © 1980-2012 IEEE.

키워드

binary neural networks (BNNs)neuromorphicone-shot patterningsource/drain sharingsynaptic deviceVertical AND-type (V-AND) flash memory
제목
Vertical AND-Type Flash Synaptic Cell Stack for High-Density and Reliable Binary Neural Networks
저자
Kim, JangsaengIm, JiseongOh, SeongbinShin, WonjunJung, GyuweonLee, Sung-TaeLee, Jong-Ho
DOI
10.1109/LED.2024.3401399
발행일
2024-07
유형
Article
저널명
IEEE Electron Device Letters
45
7
페이지
1369 ~ 1372