상세 보기
자료 필터
자료유형
발행연도
2008 ~ 2025
2008 2025
키워드
언어
전체 70건 중 11번부터 20번까지의 결과를 표시합니다.
2022
Article
An N/M-Ratio All-Digital Clock Generator with a Pseudo-NMOS Comparator-Based Programmable Divider
- 2022-01-02
- ELECTRONICS
- MDPI
Article
A Fast Lock All-Digital Programmable N/M-ratio MDLL Frequency Multiplier Using a Variable Resolution TDC
- Jang, C. ;
- Lee, P.-H. ;
- Rhee, S.-J. ;
- Choi, K.-H. ;
- Kim, J.
- 2022-01-01
- 2022 International Conference on Electronics, Information, and Communication, ICEIC 2022
- Institute of Electrical and Electronics Engineers Inc.
Article
A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
- Jin, Junghoon ;
- Kim, Seungjun ;
- Kim, Jongsun
- 2022-01-01
- IEEE Access
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
2021
Article
A 0.8-3.5 GHz shared TDC-based fast-lock all-digital DLL with a built-in DCC
- Kim, T. ;
- Kim, Jongsun
- 2021-05
- Proceedings - IEEE International Symposium on Circuits and Systems
- Institute of Electrical and Electronics Engineers Inc.
Article
A 7.68 GHz Fast-Lock Low-Jitter Digital MDLL
- Jin, J. ;
- Kim, S. ;
- Choi, S. ;
- Lee, P.-H. ;
- Rhee, S.-J. ;
- ... Kim, J. ;
- 외 1명
- 2021
- Proceedings - International SoC Design Conference 2021, ISOCC 2021
- Institute of Electrical and Electronics Engineers Inc.
2020
Article
A wide-range all-digital phase inversion DLL for high-speed DRAMs
- 2020-01
- Analog Integrated Circuits and Signal Processing
- SPRINGER
Article
An All-Digital MDLL for Programmable N/M-ratio Frequency Multiplication
- Kim, Taeyeon ;
- Choi, Sunguk ;
- Han, S. ;
- Kim, Jongsun
- 2020
- 2020 17TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2020)
- IEEE
2019
Article
A 0.8-3.4 GHz process variation insensitive duty-cycle corrector for high-speed memory I/O links
- Hwang, Heejae ;
- Kim, Jongsun
- 2019-10-10
- IEICE Electronics Express
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG